3-Step Active Gate Driving Supported by SPICE Model to Reduce Turn-Off Ringing and Overshoot of a 1.2 kV, 400 A SiC Power Module

Abstract

Active gate driving is a technique that aims to enhance the switching performance of power semiconductors via the gate signal. Utilizing a simplified gate profile can help avoid the complexities associated with advanced gate driver designs. Employing models and simulations derisk the experimental trial-and-errors for optimizing gate signal profiles. This paper demonstrates open-loop 3-step gate control of a 400 A SiC power module, to reduce turn-off voltage overshoot and ringing, coupled with an LTSpice model that is adapted from the commercially available device model, to identify safe gate current profiles. The device model adaptations are presented, including an experimental validation. A model of a gate driver with 3 parallel outputs and 3 gate resistors is used to find turn-off gate current profiles that could be implemented with commercially available components. This gate current profile is programmed into a previously reported custom active gate driver IC, and validated experimentally. This profile results in safe experimental switching waveforms, with visible improvements over gate driving with a single-step driver and a single gate resistor, that is lower voltage overshoot, no ringing, and no reduction in dv/dt. This method is designed to be implemented using available low-cost components and closed-loop optimisation of a single-parameter. © 2025 IEEE.