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One of the attacks in the RPL protocol is the Clone ID attack, that the attacker clones the node's ID in the network. In this research, a Clone ID detection system is designed for the Internet of Things (IoT), implemented in Contiki operating system, and evaluated using the Cooja emulator. Our evaluation shows that the proposed method has desirable performance in terms of energy consumption overhead, true positive rate, and detection speed. The overhead cost of the proposed method is low enough that it can be deployed in limited-resource nodes. The proposed method in each node has two phases, which are the steps of gathering information and attack detection. In the proposed scheme, each node detects this type of attack using control packets received from its neighbors and their information such as IP, rank, Path ETX, and RSSI, as well as the use of a routing table. The design of this system will contribute to the security of the IoT network. © 2021 IEEE.
Industry 4.0 provides a framework for applying new technologies in industrial environments to boost the efficiency and intelligence. A recently blossomed technology in Industry 4.0 is Internet of Things (IoT), which allows us to create a smart environment by connecting various equipment. One of the main applications of IoT in a smart factory is to design monitoring systems, which helps put the behavior of devices under permanent and comprehensive supervision. However, the rapid growth and change in the monitoring facilities creates a big challenge for people who either want to use that equipment in Industry 4.0, or want to update the systems to benefit from this technology. To address this problem, this paper presents new approach based on model-driven engineering paradigm, for simplifying the design and development of real-Time monitoring systems in an industrial environment. Our approach includes a domain-specific modeling language, a graphical editor, and model-To-code transformations that generate a hardware descriptive code, a mobile application, and a web application for a monitoring system. To evaluate the applicability of our approach, a scenario in the power industry has been designed, which offers user a VHDL code, a mobile application, and a web application for monitoring processes of the plant. © 2020 IEEE.
This paper describes an encryption system for analog signals based on permutation of samples. The scrambling algorithm is based on the permutation of the samples and provides highly secured scrambled signal by permuting a large number of those samples. The algorithm for generation the permutation matrices is explained. Important items to be considered in designing the system are discussed such as choice and construction of permutation matrices, and configuration of the practical scrambling system. C programming language was used for simulation. The results of simulation and tests shows that proposed scrambling achieve extremely high-level security. The method of choice and generation of permutation matrices, Tompkin-Paig algorithm and maximum length shift register are discussed. Simulations of different parts of the system, include scrambler, descrambler and generation of permutation matrices programs are provided. Miscellaneous methods of objective tests are described. Theoretical and simulation results of these tests are also provided. © 2002 IEEE.
The considerable growth of the number of networked devices in the world has led to the development of various and new programs in the field of IoT, which are often limited to the current network infrastructure, on the other hand, force the network administrator to implement complex network policies manually. Due to this congestion of equipment as well as the increasing complexity of traditional network configuration, Software-Defined Networks (SDNs) facilitate network management by separating the control and data layers and creating network rules. For these facilities, these networks appear to be a good infrastructure for IoT networks will enable network programming to develop new and more efficient services to meet real needs. In addition, the variety of IoT equipment can increase complex and inconsistent network rules in SDN-based switches, making network management difficult. Accordingly, in this paper, we will try to model the behavior of anomaly rules distributed in software-defined networks that have been created by different apps in the Internet of Things. It can identify their relationship with other rules in the network and avoid registering them. © 2021 IEEE.
Although high-performance artificial intelligence (AI) models require substantial computational resources, embedded systems are constrained by limited hardware capabilities, such as memory and processing power. On the other hand, embedded systems have a broad range of applications, making the integration of AI and embedded systems a prominent topic in both hardware and AI research. Creating powerful speech embeddings for embedded systems is challenging, as such models, like Wave2Vec, are typically computationally intensive. Additionally, the scarcity of data for many low-resource languages further complicates the development of high-performance models. To address these challenges, we utilized BERT to generate speech embeddings. BERT was selected because, in addition to producing meaningful embeddings, it is trained on numerous low-resource languages and facilitates the design of efficient decoders. This study introduces a compact speech encoder tailored for low-resource languages, capable of functioning as an encoder across a diverse range of speech tasks. To achieve this, we utilized BERT to generate meaningful embeddings. However, due to the high dimensionality of BERT embeddings, which imposes significant computational demands on many embedded systems, we applied dimensionality reduction techniques. The reduced-dimensional vectors were subsequently used as labels for speech data to train a model composed of convolutional neural networks (CNNs) and fully connected layers. Finally, we demonstrated the encoder's effectiveness through an application in speech command recognition. © 2024 IEEE.
Nowadays, Multi-hop wireless networks have achieved lots of attention due to their ease of development, low cost, and other advantages. Wireless channels have broadcast nature, and a sent packet can be heard by the nodes in the sender's transmission range. This feature is used in opportunistic routing to forward the packets and to enhance the network efficiency. In most of the opportunistic routing algorithms, forwarder nodes are pre-selected by the source nodes. Forwarders should be coordinated for the packet forwarding and one of them is finally selected as the next hop. If the forwarder list is large, coordination's computational overhead will be high. A new Energy efficient opportunistic routing algorithm, named EOpR is presented in this paper that selects the candidate nodes on the packets' fly. This selection is based on the region and the nodes' residual energy. Candidate nodes set a timer and the one whose timer expires first is selected as the next hop. Simulation results showed higher network performance in the terms of network's lifetime and also throughput compared to ROMER. The number of duplicate packets also decreases in EOpR. © 2015 IEEE.
The FFT speech encryption algorithm is tested on speech samples which are recorded using a data acquisition system connected to a PC. The speech samples are read from an input file by the simulation program and the scrambling operation performed on them frame-by-frame. The scrambled speech signal is output through the filter card and the DAC card. The scrambled speech samples are also recorded onto an output file on which the descrambling operations are subsequently performed. The algorithms and results of these simulation tests are provided below. An analog I/O card was used with simulation program. A 12-bit ADC and DAC card was used to capture about 4 seconds of speech at the rate of 8 Ksps. The scrambler and descrambler programs written in C processed the speech file. The main parts of the system are (i) scrambler with permutation and (ii) descrambling with depermutation. Some additional parts such as the ADC, the DAC, the IBC (integer to binary convertor) and the BIC are necessary. The basic functions can, thus be identified as follows: 1) Scrambler includes FFT, permutation and IFFT 2) Descrambler includes FFT, depermutation and IFFT 3) Generation of permutation matrices. © 2002 IEEE.
Information-Centric Networking (ICN) is focused on content itself as the key factor of communication instead of network addresses. As a successful nominee for future architecture on the Internet, ICN provides a networking paradigm shift from host-oriented to content-oriented communication. This means that a user can declare its desired content by the unique name of that content irrespective of the hosting location. ICN provides high performance content distribution framework, stronger security solutions, better mobility support and scalable network architecture. It supports different naming schemes encompassing flat, hierarchical, hybrid, and attribute-value names. These properties construct ICN as an appropriate networking infrastructure for IoT applications such as smart city. ICN can better handle large IoT name spaces with lower processing resource usage. It reduces energy consumption by in-network caching of contents. Considering an NDN-based smart city, the available naming schemes can be classified into hybrid and hierarchical names. The disadvantages of the proposed naming schemes can be summarized as the long length of the names in hierarchical approach, the difficulty of finding unique content in attributed-value naming scheme, not being user-friendly in flat naming method, and complexity in hybrid naming structures. Considering these drawbacks, we presented a hybrid name scheme for the smart city by PURSUIT architecture that provides faster name lookup in IoT communications. © 2020 IEEE.
Wireless applications have become significant in numerous fields [1] such as the auto industry. Indeed, the convergence of telecommunication, computation, wireless technology, and transportation technologies has contributed to the facilitation of our roads and highways as far as communications are concerned. This convergence in a sense is considered as a platform in intelligent transportation systems (ITS) where each vehicle is assumed to be equipped with devices as nodes in order to create contact with other nodes. Mobile ad hoc networks (MANETs) were introduced in Chapter 3. Because the features of a vehicle network are different from those of other types of MANETs, this network is called a vehicular ad hoc network (VANET) [2]. © 2017 by Taylor & Francis Group, LLC.
Scan design is a powerful Design-for-Testability (DFT) technique that enhances controllability and observability of internal nodes of the circuit under test. However, it can increase system vulnerability being a back door to access secret information of a secure chip. In this paper, we present a scan-based design which is robust against scan-based side channel attacks. We use SHA256 secure hash and Blum Blum Shub pseudo random number generator to create a simple challenge/response scheme. The system can be used to enable JTAG instructions for authorized user or control access to IEEE 1687 on-chip instruments. The effectiveness of the proposed method has been verified using NIST statistical test suite. © 2016 IEEE.
Conference Proceedings - IEEE SOUTHEASTCON (07347502) pp. 332-339
Dynamic memory management is an important and essential part of computer systems design. Efficient memory allocation, garbage collection and compaction are becoming increasingly more critical in parallel, distributed and real-time applications using object-oriented languages like C++ and Java. In this paper we present a technique that uses a Binary Tree for the list of available memory blocks and show how this method can manage memory more efficiently and facilitate easy implementation of well known garbage collection techniques.
This report deals with describing permutation of FFT (Fast Fourier Transform) coefficients in speech encryption system. The scrambling algorithm is based on the permutation of the FFT coefficients and provides highly secured scrambled signal by permuting a large number of those coefficients. The algorithm for generation the permutation matrices is explained.This system is useful for a band limited telephone channel and mobile communication. Choice and construction of permutation matrices in scrambling system are considered. Simulation have been done by using C programming language. The results of simulation and tests shows that proposed scrambling achieves extremely high-level security as well as high speech quality. © 2000 IEEE.
Underwater Technology (17560543)
It is required a precise, linear indication of the depth of water in a specific part of the sea. This demands a continuous level measurement. There are a wide variety of ways to produce a signal that tracks the depth of water in a specific part of the sea. Ultrasonic detectors find the distance between seabed to the surface of the water. To measure level, depth, with an ultrasonic range detector, the module is mounted at the bottom of the sea, seabed, looking up the surface. We must measure the time between the transmit pulse and the echo received pulses. Since the ultrasonic signal is traveling at the speed of sound, the time between transmission and echo received is a measure of the distance to the surface,water depth. A micro-controller sends a pulse to the ultrasonic module. The module is transmitting an ultrasonic wave for a short period of time and wait for receiving its echo. As soon as echo received to ultrasonic module, is sent a pulse to micro-controller, which measures the time between two pulses. There are two modes of operation, program mode and run mode. When the unit is powered. it is programmed to start up in the run mode, to detect the distance from the transducer face to a target, depth, in meter. The unit can be placed into program mode at any time by pressing the menu key to alter a value of parameters in order to better suit the application or user preferences. Unit of measurement, type of measurement, set point of alarms and factory setting are some of its parameters. The working time of transition and receiver part of the module is specifies by micro-controller normally for each second 10 ultrasonic pulses are transmitted. The measuring error is approximately 1.25%. Such an error value is acceptable with reception to wavelength of ultrasonic waves. For so many application that the precision of Cm is sufficient ultrasonic level measurement is suitable. The system protected from virtual echoed by using threshold and counting number of echo pulses. © 2002 IEEE.
Electric Power Components and Systems (15325016) 31(5)pp. 513-524
This paper presents a new model for the identification of the power system transfer functions. The usual model has been to use the shift operator q, or its equivalent z transform, but this gives inaccurate results with the small sampling times that are now used in modern controllers. It is shown by a comparison that this problem can be resolved by using the delta operator δ instead. This is shown by a multimachine example using both operators. The simulation results show that the delta operator formulation reflects the dynamic behavior of the system more accurately. © 2003 Taylor & Francis.
Data intensive service functions such as memory allocation/de-allocation, data prefetching, and data relocation can pollute processor cache in conventional systems since the same CPU (using the same cache) executes both application code and system services. In this paper we show the improvements in cache performance that can result from the elimination of the cache pollution using separate caches for memory management functions. For the purpose of our study we simulate the existence of separate hardware units for the application and the memory management services using two Unix processes. One process executes application code (simulating main CPU) while the other executes memory management code. We collected address traces for the two processes and used Dinero IV cache simulator to evaluate the expected cache behaviors. A second goal of this paper is to examine the cache performance of different memory allocators. In this paper we compare two allocators: a very popular segregated list based allocator (originally due to Doug Lea) and our own binary-tree based allocator (called Address-ordered Binary Tree). © PDCS 2003. All rights reserved.
In our prior work we explored a cache organization providing architectural support for distinguishing between memory references that exhibit spatial and temporal locality and mapping them to separate caches.That work showed that using separate (data) caches for indexed or stream data and scalar data items could lead to substantial improvements in terms of cache misses. In addition, such a separation allowed for the design of caches that could be tailored to meet the properties exhibited by different data items.In this paper, we investigate the interaction between three established methods: split cache, victim cache and stream buffer. Since significant amounts of compulsory and conflict misses are avoided, the size of each cache (i.e., array and scalar), as well as the combined cache capacity can be reduced. Our results show that on average 55% reduction in miss rates over the base configuration.
In this paper we show that cache memories for embedded applications can be designed to increase performance while reduce area and energy consumed. Previously we have shown that separating data cache into an array cache and a scalar cache can lead to significant performance improvements for scientific benchmarks. In this paper we show that such a split data cache can also benefit embedded applications. To further improve the split cache organization, we augment the scalar cache with a small victim cache and the array cache with a small stream buffer. This "integrated" cache organization can lead to 43% reduction in the overall cache size, 37% reduction in access time and a 63% reduction in power consumption when compared to a unified 2-way set associative data cache for media benchmarks from MiBench suite.
Annals of DAAAM and Proceedings of the International DAAAM Symposium (17269679) pp. 345-346
One of the problems in middle size robot soccer, which also can be applied to scanner robots routing in unpredictable environments, is leading passing among robots that comprises choosing the best team-mate to receive the ball without any need to explicit communication among robots. In this paper we have developed an algorithm based on Perceptron neural network for this problem which determines the best passing angle based on the topological data of the play field (i.e. position of robots). With a modification to Perceptron structure and proper data presentation approach a considerable improvement in solution performance has been achieved.
Journal of Systems Architecture (13837621) 52(1)pp. 41-55
In this work, we show that data-intensive and frequently-used service functions such as memory allocation and de-allocation entangle with application's working set and become a major cause for cache misses. We present our technique that transfers the allocation and de-allocation functions' executions from main CPU to a separate processor residing on chip with DRAM (Intelligent Memory Manager). The results manifested in the paper state that, 60% of the cache misses caused by the service functions are eliminated when using our technique. We believe that cache performance of applications in computer system is poor due to their indulgence for the service functions. © 2005 Elsevier B.V. All rights reserved.
Journal of Systems Architecture (13837621) 53(12)pp. 927-936
In conventional architectures, the central processing unit (CPU) spends a significant amount of execution time allocating and de-allocating memory. Efforts to improve memory management functions using custom allocators have led to only small improvements in performance. In this work, we test the feasibility of decoupling memory management functions from the main processing element to a separate memory management hardware. Such memory management hardware can reside on the same die as the CPU, in a memory controller or embedded within a DRAM chip. Using Simplescalar, we simulated our architecture and investigated the execution performance of various benchmarks selected from SPECInt2000, Olden and other memory intensive application suites. Hardware allocator reduced the execution time of applications by as much as 50%. In fact, the decoupled hardware results in a performance improvement even when we assume that both the hardware and software memory allocators require the same number of cycles. We attribute much of this improved performance to improved cache behavior since decoupling memory management functions reduces cache pollution caused by dynamic memory management software. We anticipate that even higher levels of performance can be achieved by using innovative hardware and software optimizations. We do not show any specific implementation for the memory management hardware. This paper only investigates the potential performance gains that can result from a hardware allocator. © 2007 Elsevier B.V. All rights reserved.
Environmental conditions, energy, bandwidth, storage and processing constraints, application of wireless sensor network, especially in real-time usage faces serious challenges. Thus, providing methods for reliable data transmission at desirable rate which takes into consideration energy constraint is of great importance. In this paper, a routing metric is introduced for selection of intermediate nodes which transmit data between source and destination. This metric takes into account remaining energy of the node, buffer capacity, and transmission delay and link quality. It can be applied for directed diffusion. By analysis and simulation, we show its efficiency with respect to network lifetime, load balancing capability and end-to-end delay reduction. ©2008 IEEE.
Neural Computing And Applications (09410643) 17(2)pp. 193-200
Optimizing the traffic signal control has an essential impact on intersections efficiency in urban transportation. This paper presents a two-stage method for intersection signal timing control. First, the traffic volume is predicted using a neuro-fuzzy network called Adaptive neuro-fuzzy inference system (ANFIS). The inputs of this network include two-dimensional, hourly and daily, traffic volume correlations. In the second stage, appropriate signal cycle and optimized timing of each phase of the signal are estimated using a combination of Self Organizing and Hopfield neural networks. The energy function of the Hopfield network is based on a traffic model derived by queuing analysis. The performance of the proposed method has been evaluated for real data. The two-dimensional correlation presents superior performance compared to hourly traffic correlation. The evaluation of proposed overall method shows considerable intersection throughput improvement comparing to the results taken form Synchro software. © 2007 Springer-Verlag London Limited.
Mathematical Problems in Engineering (15635147)
In this paper, we have presented a new permutation-substitution image encryption architecture using chaotic maps and Tompkins-Paige algorithm. The proposed encryption system includes two major parts, chaotic pixels permutation and chaotic pixels substitution. A logistic map is used to generate a bit sequence, which is used to generate pseudorandom numbers in Tompkins-Paige algorithm, in 2D permutation phase. Pixel substitution phase includes two process, the tent pseudorandom image (TPRI) generator and modulo addition operation. All parts of the proposed chaotic encryption system are simulated. Uniformity of the histogram of the proposed encrypted image is justified using the chi-square test, which is less than 2 (255, 0.05). The vertical, horizontal, and diagonal correlation coefficients, as well as their average and RMS values for the proposed encrypted image are calculated that is about 13 less than previous researches. To quantify the difference between the encrypted image and the corresponding plain-image, three measures are used. These are MAE, NPCR, and UACI, which are improved in our proposed system considerably. NPCR of our proposed system is exactly the ideal value of this criterion. The key space of our proposed method is large enough to protect the system against any Brute-force and statistical attacks. © 2009 S. Etemadi Borujeni and M. Eshghi.
In this paper some parameters that reasons data redundancy and kinds of data redundancy in wireless sensor networks are defined, then introduced a clustering algorithm for data reduction in wireless sensor network using benefits of sensor network such as each node receives its neighbor's data, correlation between neighbors and low rate of changing in environmental data. New introduced algorithm made better using of energy and bandwidth that are two restrictions in wireless sensor networks. Simulation results show that about 30% to 80% approve in energy consumption will be attain in new introduced algorithm for environmental low changing rate data. ©2009 IEEE.
World Academy of Science, Engineering and Technology (20103778) 37pp. 901-904
In this article, a method has been offered to classify normal and defective tiles using wavelet transform and artificial neural networks. The proposed algorithm calculates max and min medians as well as the standard deviation and average of detail images obtained from wavelet filters, then comes by feature vectors and attempts to classify the given tile using a Perceptron neural network with a single hidden layer. In this study along with the proposal of using median of optimum points as the basic feature and its comparison with the rest of the statistical features in the wavelet field, the relational advantages of Haar wavelet is investigated. This method has been experimented on a number of various tile designs and in average, it has been valid for over 90% of the cases. Amongst the other advantages, high speed and low calculating load are prominent. © 2009 WASET.ORG.
The basis of procedure in query based sensor networks is such that the component nodes of network wait for receiving query from sink and once they took the query, they provide sink with required data. An issue in this kind of networks is the way that location of responder node is calculated. This requires addition of localization mechanisms or localization hardware. The former has communication overhead and the latter has cost overhead and power consumption, both of which result in reduction in life time of the network. Since in most of these networks the exact location of nodes is not required and having the approximate location of nodes is sufficient, a model is presented in this paper that calculates the approximate location of nodes. In this model nodes can obtain their approximate location without any need to extra hardware. In this model each node can obtain its location using query packets received from different sinks. Thus there is no need to communication overhead for calculating the location as well. © 2009 IEEE.
Wireless sensor networks are networks with nodes of low power and limited processing. Therefore, optimal consumption of energy for WSN protocols seems essential. In a number of WSN applications, sensor nodes sense data periodically from environment and transfer it to the sink. Because of limitation in energy and selection of best route, for the purpose of increasing network lifetime a node with most energy level will be used for transmission of data. The most part of energy in nodes is wasted on radio transmission; thus decreasing number of transferred packets in the network will result in increase in node and network lifetimes. In algorithms introduced for data transmission in such networks up to now, a single route is used for data transmissions that results in decrease in energy of nodes located on this route which in turn results in shortened network lifetime. In this paper a new method is proposed for selection of data transmission route that is able to solve this problem. This method is based on learning automata that selects the route with regard to energy parameters and the distance to sink. In this method energy of network nodes finishes rather simultaneously preventing break down of network into 2 separate parts. This will result in increased lifetime. Simulation results show that this method has been very effective in increasing network lifetime. © 2010 IEEE.
Wireless Mesh Network (WMN) is considered to be an effective solution to support multimedia services in last miles due to their automatic configuration and low cost deployment. The main feature of WMNs is multi-hope communications which may result in increased region coverage, better robustness and more capacity. Implemented on limited radio range wireless media, WMNs bring about many challenges such as fading alleviation, effective media access control, efficient routing, quality of service provisioning, call admission control and scheduling. In this paper main concepts of scheduling in mesh networks are introduced and its basic techniques in WMNs are reviewed. © 2010 IEEE.
Wireless sensor networks are composed of sensors with low computational and energy resources. Transmission of data is one of the most energy consuming operations in such networks. In-network data aggregation is a popular technique which is performed to reduce data transmissions. However, by aggregating multiple data into one, the security of them is no longer guaranteed. While concealed data aggregation methods have been recently proposed to provide energy efficient, end-to-end confidentiality, not much work has been done to enhance them with aggregate integrity. In this work, we propose a scalable and energy efficient bihomomorphic method to preserve end-to-end confidentiality and aggregate integrity against outsider attacks. A distributed validation scheme is used to prevent blind rejection caused by outsiders. To provide better resilience, a key refreshment method is used to prevent analysis attacks. © 2011 IEEE.
Quantum cellular automata (QCA) is a new nanotechnology that has attracted attentions due to its lower power consumption, smaller size and higher speed compared to CMOS technology. Majority and inverter gates together make a universal set in QCA circuits. An important step in designing QCA circuits is reducing the number of required cells. This paper introduces the structure of QCA and its basic circuits and then proposes a method to reduce the number of cells used in designing these circuits based on genetic algorithm. The results of this method compared with previous methods indicate a significant improvement in terms of number of cells used in the synthesis of QCA circuits. © 2011 IEEE.
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